






















Study with the several resources on Docsity
Earn points by helping other students or get them with a premium plan
Prepare for your exams
Study with the several resources on Docsity
Earn points to download
Earn points by helping other students or get them with a premium plan
An in-depth exploration of various operators and attributes used in vhdl (vhsic hardware description language). Operators include assignment, logical, relational, shift, adding, multiplying, and miscellaneous operators. Attributes are values, functions, types, ranges, signals, or constants that can be associated with names within a vhdl description. User-defined and predefined attributes, as well as their classes and examples.
Typology: Slides
1 / 30
This page cannot be seen from the preview
Don't miss anything!























<= Used to assign a value to a Signal := Used to assign a value to a variable, constant, or Generic Must be the same size and type => Used to assign values to individual vector elements or with OTHERS.
=
To use a attribute the “’” (apostrophe) construct must be employed
Example: Integer’right is 2147483647 bit’right is ‘1’
Example: Type bit8 is 255 downto 0 bit8’high is 255
Example: Type bit8 is 255 downto 0; bit8’low is 0;
Example: Type color is (red,green, blue, orange); color’pos(green) is 1;
Example: Type color is (red,green, blue, orange); color’pred(blue) is green;
Example: Type color is (red,green, blue, orange); color’leftof(blue) is green
Example: Type color is (red,green,blue,orange); color’rightof(blue) is orange;
Type s is (1,0,0,1,0,1) S’rightof(1)
Type a_type is array(0 to 3, 7 downto 0) of bit;
Type a_type is array(0 to 3, 7 downto 0) of bit;
Example: a_type’reverse_range(1) 3 downto 0 a_type’reverse_range(2) 0 to 7;