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July 2003 1/
® VNQ660SP
QUAD CHANNEL HIGH SIDE SOLID STATE RELAY
(*) Per each channel
n OUTPUT CURRENT PER CHANNEL: 6A
n CMOS COMPATIBLE INPUTS
n OPEN LOAD DETECTION (OFF STATE)
n UNDERVOLTAGE & OVERVOLTAGE
nSHUT- DOWN
n OVERVOLTAGE CLAMP
n THERMAL SHUT-DOWN
n CURRENT LIMITATION
n VERY LOW STAND-BY POWER DISSIPATION
n PROTECTION AGAINST:
nLOSS OF GROUND & LOSS OF VCC
n REVERSE BATTERY PROTECTION (**)
DESCRIPTION
The VNQ660SP is a monolithic device made by
using| STMicroelectronics VIPower M0-
Technology, intended for driving resistive or
inductive loads with one side connected to ground.
This device has four independent channels. Built-
in thermal shut down and output current limitation
protect the chip from over temperature and short
circuit.
TYPE RDS(on) I (^) OUT VCC VNQ660SP 50mΩ (*) 6A 36 V
ABSOLUTE MAXIMUM RATING
(**) See application schematic at page 8
Symbol Parameter Value Unit VCC Supply voltage (continuous) 41 V -VCC Reverse supply voltage (continuous) -0.3 V I (^) OUT Output current (continuous), per each channel Internally limited A IR Reverse output current (continuous), per each channel -15 A IIN Input current +/- 10 mA I (^) STAT Status current +/- 10 mA IGND Ground current at TC <25°C (continuous) -200 mA
VESD
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
- STATUS
- OUTPUT
- V (^) CC
V
V
V
V
P (^) tot Power dissipation at T (^) C=25°C 113.6 W Tj Junction operating temperature -40 to 150 °C Tstg Storage temperature -65 to 150 °C EC Non repetitive clamping energy at T (^) C=25°C 150 mJ
PowerSO-10™
1
10
ORDER CODES
PACKAGE TUBE T&R
PowerSO-10™ VNQ660SP VNQ660SP13TR
This datasheet has been downloaded from http://www.digchip.com at this page
BLOCK DIAGRAM
UNDERVOLTAGE
OVERVOLTAGE
OVERTEMP. 1
OVERTEMP. 2
I LIM
DEMAG 2
I LIM
DEMAG 1
INPUT 1
INPUT 2
GND
VCC
OUTPUT 1
OUTPUT 2
DRIVER 2
DRIVER 1
LOGIC
OVERTEMP. 3
OVERTEMP. 4
ILIM
DEMAG 4
I LIM
DEMAG 3
INPUT 3
INPUT 4 OUTPUT 3
OUTPUT 4
DRIVER 4
DRIVER 3
STATUS STATUS
OPEN LOAD
OFF-STATE
CURRENT AND VOLTAGE CONVENTIONS
I S
I GND
VCC
GND
INPUT 4
INPUT 3
I OUT
I IN
I IN
V IN
VIN
VCC
V OUT
IOUT
V OUT
INPUT 1
I IN
INPUT 2
V I^ IN
IN
VIN
ISTAT
STATUS
VSTAT
OUTPUT 4
OUTPUT 3
I OUT
I OUT
V OUT
V OUT
OUTPUT 1
OUTPUT 2
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING (V CC=13V)
PROTECTIONS (per each channel)
LOGIC INPUT (per each channel)
OPENLOAD DETECTION (off state) per each channel
(*) See Figure 1
Symbol Parameter Test Conditions Min Typ Max Unit td(on) Turn-on delay time RL=13Ω channels 1,2,3,4 40 70 μs td(off) Turn-on delay time RL=13Ω channels 1,2,3,4 40 140 μs
dV (^) OUT/dt (^) (on) Turn-on voltage slope RL=13Ω channels 1,2,3,
See relative diagram
V/μs
dV (^) OUT/dt (^) (off) Turn-off voltage slope RL=13Ω channels 1,2,3,
See relative diagram
V/μs
Symbol Parameter Test Conditions Min Typ Max Unit T (^) TSD Shutdown temperature 150 170 200 °C TR Reset temperature 135 °C Thyst Thermal hysteresis 7 15 25 °C
I (^) lim DC Short circuit current
9V<VCC <36V
6V<VCC <36V
A
A
Vdemag Turn-off output voltage clamp IOUT=2A; VIN=0V; L=6mH VCC -41 VCC -48 V (^) CC-55 V
VSTAT
Status low output voltage
ISTAT =1.6mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT =5V 10 μA
CSTAT Status pin input capacitance Normal operation; VSTAT =5V 25 pF
VSCL Status clamp voltage
ISTAT =1mA ISTAT =-1mA
8 V
V
Symbol Parameter Test Conditions Min Typ Max Unit V (^) IL Input Low Level Voltage 1.25 V VIH Input High Level Voltage 3.25 V VHYST Input Hysteresis Voltage 0.5 V I (^) IH Input high level voltage V (^) IN=3.25V 10 μA I (^) IL Input Current V (^) IN=1.25V 1 μA CIN Input Capacitance 40 pF
V (^) ICL
Input Clamp Voltage I (^) IN =1mA I (^) IN =-1mA
8 V
V
Symbol Parameter Test Conditions Min Typ Max Unit t (^) SDL Status Delay (*) 20 μs
V (^) OL Openload Voltage Detection Threshold
VIN=0V 1.5 2.5 3.5 V
TDOL
Openload Detection Delay at Turn Off VCC=18V (*) 300 μs
ELECTRICAL TRANSIENT REQUIREMENTS
SWITCHING CHARACTERISTICS
ISO T/R 7637/
Test Pulse
TEST LEVELS
I II III IV Delays and Impedance 1 -25 V -50 V -75 V -100 V 2 ms 10 Ω 2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω 3a -25 V -50 V -100 V -150 V 0.1 μs 50 Ω 3b +25 V +50 V +75 V +100 V 0.1 μs 50 Ω 4 -4 V -5 V -6 V -7 V 100 ms, 0.01 Ω
ISO T/R
Test Pulse
Test Levels Result
I II III IV
1 C C C C
2 C C C C
3a C C C C 3b C C C C 4 C C C C 5 C E E E
Class Contents C All functions of the device are performed as designed after exposure to disturbance.
E One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
t
t
VLOAD
VIN
dVOUT/dt (^) (on)
td(off)
dV (^) OUT/dt (^) (off)
t (^) d(on) t (^) r
STATUS
INPUT (^) n
NORMAL OPERATION
UNDERVOLTAGE
VCC
V USD
VUSDhyst
INPUTn
OVERVOLTAGE
V CC
VCC>V OV
STATUS (^) n
INPUTn
STATUSn
undefined
OVERTEMPERATURE
INPUT (^) n
STATUS (^) n
TTSD
T R
Figure 2: Waveforms
T (^) j
LOAD VOLTAGEn
V CC<V OV
LOAD VOLTAGEn
LOAD VOLTAGE (^) n
LOAD CURRENT (^) n
STATUS (^) n
INPUT (^) n
OPENLOAD with external pull-up
LOAD VOLTAGE (^) n
t (^) DOL t^ DOL
VOL
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R (^) GND only). This can be used with any type of load. The following is an indication on how to dimension the RGND resistor.
- R (^) GND ≤ 600mV / (I (^) S(on)max).
- R (^) GND ≥ (−V (^) CC) / (-I (^) GND) where -I (^) GND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device’s datasheet. Power Dissipation in RGND (when VCC<0: during reverse battery situations) is: PD= (-VCC)^2 /RGND This resistor can be shared amongst several different HSD. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different devices. Please note that if the microprocessor ground is not common with the device ground then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND. If the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then the ST suggests to utilize Solution 2 (see below). Solution 2: A diode (DGND) in the ground line. A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device
APPLICATION SCHEMATIC
VCC1,
Dld
+5V
Rprot STATUS
INPUT
+5V
OUTPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
Rprot
Rprot
Rprot
Rprot
INPUT
μC
GND
DGND
RGND VGND
Note: Channels 3 & 4 have the same internal circuit as channel 1 & 2.
High Level Input Current
Input Clamp Voltage
Off State Output Current
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
1
2
3
4
5
6
7
Iih (μA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
6
7
8
Vicl (V)
Iin=1mA
Input High Level
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
2
3
Vih (V)
Input Low Level Input Hysteresis Voltage
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
1
2
Vil (V)
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
1
2
Vhyst (V)
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
1
2
3
4
5
6
7
8
9
10
IL(off1) (μA)
Off state Vcc=24V Vout=0V
Overvoltage Shutdown
Turn-on Voltage Slope Turn-off Voltage Slope
ILIM Vs T case
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
34
36
38
40
42
44
46
48
50
52
54
Vov (V)
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(on) (V/ms)
Vcc=13V Rl=13Ohm
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
100
200
300
400
500
600
700
dVout/dt(off) (V/ms)
Vcc=13V Rl=13Ohm
On State Resistance Vs Tcase On State Resistance Vs VCC
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
5
10
15
20
Ilim (A)
-50 -25 0 25 50 75 100 125 150 175 Tc (ºC)
0
10
20
30
40
50
60
70
80
90
100
RDS(on) (mOhm)
Iout=1A Vcc=9V; 13V; 18V
8 9 10 11 12 13 14 15 16 17 18 19 20 Vcc (V)
0
10
20
30
40
50
60
70
80
90
100
RDS(on) (mOhm)
Iout=1A Tc=150ºC
Tc=25ºC
Tc= - 40ºC
PowerSO-10™ PC Board
R thj-amb Vs. PCB copper area in open box free air condition
PowerSO-10™ THERMAL DATA
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm, Cu thickness=35μm, Copper areas: from minimum pad lay-out to 8cm^2 ).
30
35
40
45
50
55
0 2 4 6 8 10
PCB Cu heatsink area (cm^2)
RTHj_amb (°C/W)
Tj-Tamb=50°C
DIM.
mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 3.35 3.65 0.132 0. A () 3.4 3.6 0.134 0. A1 0.00 0.10 0.000 0. B 0.40 0.60 0.016 0. B () 0.37 0.53 0.014 0. C 0.35 0.55 0.013 0. C () 0.23 0.32 0.009 0. D 9.40 9.60 0.370 0. D1 7.40 7.60 0.291 0. E 9.30 9.50 0.366 0. E2 7.20 7.60 0.283 300 E2 () 7.30 7.50 0.287 0. E4 5.90 6.10 0.232 0. E4 () 5.90 6.30 0.232 0. e 1.27 0. F 1.25 1.35 0.049 0. F () 1.20 1.40 0.047 0. H 13.80 14.40 0.543 0. H () 13.85 14.35 0.545 0. h 0.50 0. L 1.20 1.80 0.047 0. L () 0.80 1.10 0.031 0. α 0º 8º 0º 8º α (*) 2º 8º 2º 8º
PowerSO-10™ MECHANICAL DATA
(*) Muar only POA P013P
DETAIL "A"
PLANE
SEATING
α
L
A
F A
h
A
D = (^) D1= = =
E
0.10 A
E
C
A
B
B
DETAIL "A"
SEATING PLANE
E
10
1
e B
H E
P095A
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